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| ice:oem_integration [2020/03/06 01:52] – [Power Draw by Module] Michael Radunsky | ice:oem_integration [2020/03/06 01:53] – [I2C Addressing] Michael Radunsky |
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| This section details considerations for communicating with ICE modules in the system. For pin definitions and types of connectors for interfacing with the ICE stack, refer to the [[ice:master|ICE-MC1 master controller product page]]. | This section details considerations for communicating with ICE modules in the system. For pin definitions and types of connectors for interfacing with the ICE stack, refer to the [[ice:master|ICE-MC1 master controller product page]]. |
| ==== I2C Addressing ==== | ==== I2C Addressing ==== |
| The ICE board stack uses an [[http://en.wikipedia.org/wiki/I%C2%B2C|I2C communication bus]] to control each board. I<sup>2</sup>C is an addressable protocal, therefore each ICE daughter module needs to have a unique address set. Up to 8 daughter modules (not including the [[ice:master|ICE-MC1]] master controller) can be stacked together. Each ICE circuit board has a 3 position DIP switch (shown in <imgref dipSwitch>) installed that allows the setting of each modules I<sup>2</sup>C address (between 0-7). The selection of address is in binary with DIP position 1 corresponding to the least significant bit. Setting a bit "HIGH" is done by sliding the switch to the side marked with the word "ON", which is shown highlighted in <imgref dipSwitchDiagram>. An example address setting is shown in <tabref i2cAddrEx>. Valid I<sup>2</sup>C addresses are from 0-7, and every ICE module must be set to have a unique address or communications bus collisions will occur. | The ICE board stack uses an [[http://en.wikipedia.org/wiki/I%C2%B2C|I2C communication bus]] to control each board. I<sup>2</sup>C is an addressable protocol, therefore each ICE daughter module needs to have a unique address set. Up to 8 daughter modules (not including the [[ice:master|ICE-MC1]] master controller) can be stacked together. Each ICE circuit board has a 3 position DIP switch (shown in <imgref dipSwitch>) installed that allows the setting of each modules I<sup>2</sup>C address (between 0-7). The selection of address is in binary with DIP position 1 corresponding to the least significant bit. Setting a bit "HIGH" is done by sliding the switch to the side marked with the word "ON", which is shown highlighted in <imgref dipSwitchDiagram>. An example address setting is shown in <tabref i2cAddrEx>. Valid I<sup>2</sup>C addresses are from 0-7, and every ICE module must be set to have a unique address or communications bus collisions will occur. |
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| <WRAP center> | <WRAP center> |
