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--- ice:oem_integration [2014/07/03 17:34] – [Power Sequencing] jtshugrue
+++ ice:oem_integration [2014/07/31 01:37] – external edit 127.0.0.1
@@ Line 10: / Line 10: @@
 Considerations for integrating the ICE Platform stack in an OEM situation are detailed in the remainder of this document. Important key points include deciding on the type and quantity of daughter modules to use and how that relates to the overall power budget for both the power supply and the maximum currents that can be routed through the power bus. The mechanics of mounting the circuit boards and designing a thermal management system must also be designed. Connections for communication and I/O from the circuit boards to the integrator's system are also detailed in the document.
+Can't find what you are looking for?  A [[https://groups.google.com/forum/#!forum/vescent-ice-qa|forum]] has been established for Q&A and information dissemination.  We invite you to join.
 ===== Power Requirements =====
 ==== Power Entry ====
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 |  8  |Wait 2.5 seconds |
 |  9  |Broadcast System Ready I<sup>2</sup>C command((This command is detailed in the communications section)) |
+|  10  |Broadcast Interlock Off I<sup>2</sup>C command((This command is detailed in the communications section)) |
 === Power Off Sequence ===
@@ Line 119: / Line 122: @@
 </WRAP>
 Each PCB exposes up to 4 copper tabs to conduct heat out from power dissipating components to an external heat sink. The copper tabs are not electrically isolated, so electrical isolation is **required** at the interface between the heatsink and copper tab. Failure to isolate these tabs will result in malfunction of the ICE module. For electrical isolation with good thermal conductivity, [[http://www.bergquistcompany.com/thermal_materials/sil-pad.htm|Sil-Pad]] can be used. Sil-Pad requires a certain amount of pressure to ensure good thermal conductivity, so a clamp mechanism should be applied to the copper tabs. The Sil-Pad is shown in pink in <imgref thermalManagementSinglePCB> and <imgref thermalManagementClamp>.
+Further information on thermal management of the ICE boards, including CAD drawings of the heat sink clamp assembly, can be [[http://cdn.vescent.com/wp-content/uploads/2014/07/ICE-OEM-Board-design-pack.zip?829774|downloaded here]].
 <WRAP center round important 60%>
@@ Line 127: / Line 132: @@
 <imgcaption thermalManagementClamp|Detail of a clamping mechanism used to conduct heat with electrical isolation.>{{ :ice:oem_heat_sinking_wedge_spec_-_image_07.png?600 |}}</imgcaption>
 ==== Board Connections ====
-Each ICE daughter module exposes analog interfaces on the side opposite to the copper heatsink tabs. Each module's circuit board may use a mixture of the connectors described in this section. Each connector and an associated part number shown below such that the OEM integrator my chose a suitable mating connector for their system. Consult the product pages for each ICE module to determine the type, position, and function of any connectors used.
+Each ICE daughter module exposes analog interfaces on the side opposite to the copper heatsink tabs. Each module's circuit board may use a mixture of the connectors described in this section. Each connector and an associated part number shown below such that the OEM integrator my chose a suitable mating connector for their system. Consult the product pages for each ICE module to determine the type, position, and function of any connectors used. See the respective product pages for each OEM board for a diagram of the positioning of any connectors.
+For all ICE daughter modules, the circuit boards are designed such that all I/O connectors will be on a single side, and the copper heatsinking tabs will be on the opposite side. The master controller (ICE-MC1) also follows this convention, with the exception being the serial port flat flex connector.
 === Ultra-Miniature Coax Connector (UMCC) ===
@@ Line 140: / Line 146: @@
 === Flat Flex Connector (FFC) ===
 These FFC connectors ([[http://www.digikey.com/product-detail/en/SFW12R-1STE1LF/609-1900-1-ND/1003179|FCI PN: SFW12R-1STE1LF]]) are used the [[ice:quadtemp|ICE-QT1]] to bring out the thermistor and TEC drive signals. Lower pin count ones are also used on the [[ice:master|ICE-MC1]] master controller for interfacing digital communications. Standard 1.00 mm pitch FFC jumper cables can be used to connect to an FFC connector on the other end. The ICE system uses right angle, 1.00 mm pitch, bottom contact FFC connectors.
+<WRAP center round info 60%>
+Generally, the minimum bend radius for flat flex jumper cables is 2mm. The length of the stiffener behind the exposed contacts on the cable will determine how far out from the FFC pcb connector the first bend of the flat flex cable can occur. The clearance for this bend must be accounted for when designing an enclosure for the ICE boards. For example, with Molex brand flat flex cables, there needs to be a minimum 0.25 inch clearance from the front of the flat flex pcb connector to allow the cable to bend. Verify against the data sheet of the chosen flat flex jumper cable.
+</WRAP>
 <imgcaption ffcConnector|Surface mount, 12-pin, 1.00 mm pitch, bottom contact FFC connector. FCI PN: SFW12R-1STE1LF>{{ :ice:sfw12r-1ste1lf.jpg?300 |}}</imgcaption>
@@ Line 168: / Line 178: @@
-<imgcaption dipSwitch|Photo of I<sup>2</sup>C address selection DIP switch.>{{ :ice:cvs-03tb.jpg?300 |}}</imgcaption>
+<imgcaption dipSwitch|Photo of I2C address selection DIP switch.>{{ :ice:cvs-03tb.jpg?300 |}}</imgcaption>
 <imgcaption dipSwitchDiagram|The side which corresponds to ON or HIGH is highlighted in yellow.>{{ :ice:addressdipswitch.png |}}</imgcaption>
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 When power up or shutting down the ICE modules, there are two I<sup>2</sup>C commands that must be sent. The [[ice:master|ICE-MC1 master controller]] automatically sends this commands and sequences the power rails, so sending this commands is not necessary if the ICE-MC1 is used.
-At power on, once all voltage rails have been turned on and settled, the "System Ready" I<sup>2</sup>C command should be sent to the stack. It is advisable to wait at least 2.5 seconds after the last power rail has been turned on to send this command. See the [[ice:oem_integration#power_sequencing|power sequencing section]] for timing details. The ID of this command is 7 and takes no arguments. To send the command, send an I<sup>2</sup>C packet on one byte with the value of 0x07 to each ICE daughter module address (possible addresses are 0-7).
+At power on, once all voltage rails have been turned on and settled, the "System Ready" I<sup>2</sup>C command should be sent to the stack. It is advisable to wait at least 2.5 seconds after the last power rail has been turned on to send this command. See the [[ice:oem_integration#power_sequencing|power sequencing section]] for timing details. The ID of this command is 7 and takes no arguments. To send the command, send an I<sup>2</sup>C packet on one byte with the value of 0x07 to each ICE daughter module address (possible addresses are 0-7). In addition, the "Interlock" command should be sent to allow all modules that have a laser current controller to turn on. The interlock command has an ID of 12 and an argument of 1. To send the command, send an I<sup>2</sup>C packet on two bytes with the value of [0x0C,0x01] to each ICE daughter module address (possible addresses are 0-7).
 Before turning off any voltage rails for shutdown, the "System Shutdown" Read I<sup>2</sup>C command should be sent to the stack. The ID of this command is 3 and takes no arguments. To send the command, send an I<sup>2</sup>C packet on one byte with the value of 0x03 to each ICE daughter module address (possible addresses are 0-7). This packet should be sent at least 1 second before turning off any power rails to give time for all ICE daughter modules to prepare for a clean shutdown. Again, see the [[ice:oem_integration#power_sequencing|power sequencing section]] for timing details.